vctx

Beginner-friendly language for Hardware Design.

component Blinky(output led: u1) {
  // A 27-bit register initialized to 0
  reg counter: u27 = 0

  // Sequential update
  counter <= counter + 1

  // Combinational connection
  led := counter[24]
}

Why vctx?

vctx is a Hardware Description Language (HDL) designed with modern language features and a fast development lifecycle.

Explicit Timing

Clear distinction between combinational and sequential logic. := for wires. <= for clocked updates.

Built on CIRCT

Leverages the power of LLVM and MLIR via the CIRCT project. Compiles to clean SystemVerilog for synthesis.

Formal Verification

First-class support for formal methods. Use sym, assume, and assert to prove correctness.

Next Steps

Install vctx

Get up and running with the language and the CLI.

Learn the Philosophy

Understand why vctx exists and how it differs from Verilog.

Changes to upstream to CIRCT:

Python bindings for func
Arc dialect assert

Need an offline copy? Download Full Manual (.md)