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Wires & Registers

The keyword wire declares a combinational signal (a simple electrical connection) that has no memory. Its output is calculated instantaneously based on its input.

wire result: u8
result := a + b

Assignment: Can only be driven using :=.
Initialization: wire x: u8 = 0 sets the default value. This is used if no other assignment drives the wire (e.g., to prevent latches in when blocks). If no literal is present, it defaults to 0.

The keyword reg declares a sequential register (a flip-flop).

reg counter: u8 = 0
counter <= counter + 1

Clock: Implicitly wired to the global clk.
Assignment: Can only be changed using <=.
Reset: The declaration = literal guarantees the register is set to that value when the global rst signal is asserted.